@q3k@social.hackerspace.pl
me hearing about your fancy 'RISC'-V architecture that doesn't even have branch delay slots and data hazards
me hearing about your fancy 'RISC'-V architecture that doesn't even have branch delay slots and data hazards
What a great #39c3 ! This year's priority was to mingle with friends both old and new, and that worked really well. It was great talking to everyone, even on day 3 when I was too fatigued to string together a coherent sentence. Definitely a top 3 congress in the 13 years I've been attending.
Happy new year, and maybe see you at teardown tonight!
the perfect saturday night does exist
I can finally reveal some research I've been involved with over the past year or so.
We (@redford@infosec.exchange, @mrtick@infosec.exchange and I) have reverse engineered the PLC code of NEWAG Impuls EMUs. These trains were locking up for arbitrary reasons after being serviced at third-party workshops. The manufacturer argued that this was because of malpractice by these workshops, and that they should be serviced by them instead of third parties.
1/4